BEAVERTON, Ore., November 10, 2022 – The CXL Consortium, an industry standards body dedicated to advancing Compute Express Link (CXL) technology will be holding a booth (#2838) at the annual Supercomputing event , SC’22, taking place November 14-17 at the Kay Bailey Hutchison Convention Center in Dallas, TX. Member companies AMD, Astera Labs, Elastics.cloud, Intel, IntelliProp, MemVerge, Microchip, Rambus, Samsung, Synopsys, UnifabriX, and Xconn Technologies will provide demonstrations of CXL technology.
SC’22 attendees are encouraged to attend our Exhibitor Forum presentation on Wednesday, November 16 from 11:00 a.m. to 11:30 a.m. in Room D171. Presenter Kurt Lender (Intel) will share information about the new features and usage models enabled in the CXL 3.0 specification and present the CXL technology demos on display at the CXL booth.
Additionally, representatives from the CXL Consortium will participate in a Birds of a Feather session on Thursday, November 17 from 12:15 p.m. to 1:15 p.m. in room D167 titled: “A Look at the Compute Express Link (CXL) Device Ecosystem ”. Participants include Sandeep Dattaprasad (Astera Labs), Cheolmin Park (Samsung), Jerry Lotto (Synopsys) and moderator Kurtis Bowman (AMD). A question-and-answer session will close the round table.
CXL Consortium at SC’22
CXL Booth #2838
CXL technology demonstrations as follows:
- AMD — AMD SEV Enabled Confidential Containers on CXL Encrypted Memory
- Astera Labs – CXL from Promise to Reality with Real Silicon on Client Platforms
- Elastics.cloud — Rack-Scale Memory Pooling with CXL
- Intel — CXL Type 2 Compliance and Traffic Demonstration Using 4th Generation Intel Xeon Scalable Processors and Intel FPGAs
- IntelliProp – Disaggregated Composable CXL Attached Memory Fabric
- MemVerge – Memory visualization, prioritization and pooling software
- Microchip – CXL-based SMC 2000 Intelligent Memory Controllers
- Rambus — CXL memory expansion with Intel Archer City PDK
- Samsung — AI/ML Application on CXL Memory Expander with Scalable Memory Development Kit (SMDK)
- Synopsys Inc. — Synopsys CXL 2.0 IP Passed Interoperability and Conformance Testing
- UnifabriX — CXL-Based Intelligent Memory Node
- Xconn Technologies — CXL Memory Pooling with a CXL Switch
Presentation: Exhibitor Forum (Room D171)
- Wednesday, November 16 at 11 a.m.
- Title: “Presentation of CXL 3.0 for a larger scale and optimized use of resources and demonstrations of CXL technology”
- Presenter: Kurt Lender (Intel)
Birds of a Feather (Room D167)
- Thursday, November 17 at 12:15 p.m.
- Title: An overview of the Compute Express Link (CXL) device ecosystem
- Participants: Sandeep Dattaprasad (Astera Labs), Cheolmin Park (Samsung), Jerry Lotto (Synopsys)
- Moderator: Kurtis Bowman (AMD)
- Kay Bailey Hutchison Convention Center, Dallas, TX
- Monday, November 14, 2022 – Exhibitor gala at 7:00 p.m.
- From Tuesday 15 November to Thursday 17 November 2022
Exhibitors’ lounge open:
- 10 a.m. – 6 p.m. Tuesday to Wednesday
- 10:00 a.m. – 3:00 p.m. Thursday
About the CXL Consortium
The CXL Consortium is an industry standards body dedicated to advancing Compute Express Link (CXL) technology. CXL is a high-speed interconnect providing memory coherency and semantics using high-bandwidth, low-latency connectivity between the host processor and peripherals such as accelerators, buffers, and smart I/O devices . For more information or to register, visit www.computeexpresslink.org.
Source: CXL Consortium