The Linux of chips, open source RISC-V instruction set architecture, has big backers including Intel, AMD and Nvidia. But software support is still far from mature.
RISC-V International, the organization responsible for defining the instruction set architecture, has established a roadmap for boosting low-level software to improve its appeal to hardware and software developers.
Hardware equivalent to Linux
The chip architecture is license-free, and silicon companies can take the open-source design and adapt it to specific needs. RISC-V is a free alternative to architectures such as x86 and ARM, for which customers must pay license fees or royalties. RISC-V is considered a hardware equivalent of Linux, which is open source but can be customized to specific needs.
Computers are available with RISC-V chips developed by companies like SiFive. Intel has committed $1 billion to the design and manufacture of chips including RISC-V, ARM and x86, and is partnering with the Barcelona Supercomputing Center to manufacture a RISC-V supercomputing chip.
The RISC-V architecture is modular, with a basic architecture design around which different modules can be attached. The RISC-V Foundation is adding new specifications to its architecture and is also considering standardizing custom specifications developed by member companies. The goal is to reduce fragmentation, a problem that sealed the fate of the MIPS architecture.
“RISC-V ratifies four specifications coming this quarter,” said Mark Himelstein, chief technology officer at RISC-V International.
The most important specification is RISC-V for SPI, which is more of a hypervisor layer that helps the operating system kernel communicate with the hardware platform.
The specification is machine-level code for accessing various configuration information and for performing infrequent activities in systems.
“Originally it was done as a technique of abstraction so it wasn’t in 1,500 places. It has also become very important for security so that only this layer actually accesses it,” Himelstein said.
Proof of concept
RISC-V has done a proof of concept for it, run it on simulators, and are excited about it, Himelstein said.
The second specification to be ratified includes the RISC-V Unified Extensible Firmware Interface (UEFI) protocols, which is the boot interface, much like those of existing Linux and Windows systems.
“There’s an upstream project and we worked very closely with them to get our changes validated, but then they blessed it. The board also ratified that one. It’s one of those little pieces that the ecosystem needs,” Himelstein said.
This year, RISC-V International also plans to introduce “profiles”, which are sets of standardized instructions for different applications. Himelstein hopes profiles will reduce software effort by forcing hardware to have a restricted set of things that work together.
There is a list of instructions in profiles under names like RVA20, which are application layers. This goes to the compiler, it gets a flag and marks the binary. The OS can either go to verify that it can run this binary or respond that it doesn’t support the profile and can’t run this binary.
“It’s a way of making sure everything comes together. Distributions then don’t have to go ahead and deal with each vendor’s particular choices. Vendors love it because we, the community, bear the brunt of moving the software ecosystem to support this stuff,” Himelstein said.
Companies such as Google and Alibaba also support RISC-V. Companies in Russia and China – which have limited access to the most advanced x86 chips – are also developing chips based on the RISC-V architecture.